MYSP-PI-2022-061

冼世榮


下載導師簡歷CV
Section 1: Personal Particulars

冼世榮
Sai-Weng Sin
Associate Professor
+853 88228795
terryssw@um.edu.mo
N21-3007, University of Macau
University of Macau
UMAC-SKL of Analog and Mixed-Signal VLSI

Research Project provided for Macao Youth Scholars Program:

用於物聯網應用的低功耗高性能模數轉換器芯片設計
Low Power High-Performance Analog-to-Digital Converters Integrated Circuits for IoT
0809 电子科学与技术
0809 电子科学与技术
PhD degree holders in the area of analog-to-digital converters IC
PhD degree holders in the area of analog-to-digital converters IC
Please refer to the attached CV for details.

Section 2: Research Interests and Grants

Integrated Circuits for Analog-to-Digital Converters, Power Management Integrated Circuits, Analog circuits for Machine Learning
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LDO-free Power Management System – Delta-Sigma Modulator ADC Directly Powered by Boost-up DC-DC Converter,” Multi-Year Research Grant, funded by Research Committee of University, 2022 – 2023. (MYRG2020-00013-IME), Funding amount: 520,000 Mop;
FDCT Operating Fund for State-Key Laboratory of Analog and Mixed-Signal VLSI: 200,000 Mop for Post-Doctoral Fellow